NOT

NOT R[x], R[y] - Bitwise Negation

Operating Mode

R[x] := inverted Bits of R[y]

PC := PC + 1

Description

Inverts all Bits of R[y] and saves result to register R[x].

Status Register

Zero - Bit := 1 if all Bits of R[y] are 0 after inverting

Binary Command

15 14 13 12 11	10 9 8	7 6	5 4 3	2 1 0
00000	Adr(x)	--	Adr(y)	---

Example

NOT R[5], R[6]

15 14 13 12 11	10 9 8	7 6	5 4 3	2 1 0
00000	101	--	110	---

Note
Arithmetic and Logical Commands always affect the Status Bits Carry and Zero.
After any Logical Command the Carry Bit is set to 0.